02184nam a22001577a 4500999001700000100006400017245005000081260003000131300001100161500158900172700004201761856003301803942001101836952008901847952009001936 c55806d55803 aDahri, Safia AmiraSupervisor Prof. Dr. Abdul Fatah Chandio aImplementation of Huffman Decoder (ME Theses) aNawabshsh:bQUEST,c2014. a52p, : aABSTRACT Loss less data compression algorithms are most widely used in data transmission and receptions systems and storage systems in order to increase data rate, speed and save lot of space on stage devices. Now day different algorithms are implemented on hardware to achieve benefits of hardware realizations. Hardware implementation of algorthams ditital signal processers algorithms and filter realization is done on programmable devices i.e. FPGA. FPGA has major advantages of speed, time, configurability and efficient. In loss less data compression algorithms, Huffman algorithm is most widely used because of its variable length coding feature and many other benefits. Huffman Algorithms are used in many applications in software form e.g Zip and Unzip, communication etc. In this thesis, Huffman algorithm is implemented on FPGA Spartan 3E board. This board is provided by XiLinx. This FPGA is programmed by tool provided by Xilinx is Xilinx ISE 8.2i. TJ1e program is written is VHDL and text data is decoded by Huffman algorithm on Hardware board which was previously encoded by Huffman. In order to visualize the output clearly in waveforms, same code is simulated on ModeJSim v6.4.Huffinan decoder is also implemented on MATLAB for verification of operation. Today, Huffman algorithm is used in most of the fields of engineering, signal processing and communication. FPGA is configurable device which is more efficient in al! aspects. Text application, image processing, video streaming and in many other applications Jhuffman algorithms are implemented.  aDepartment of Electronic Engineering  uhttps://tinyurl.com/s8r77k4d cTHESIS 00104070aRESEARCHbRESEARCHd2016-11-21l0pMP/05-49r2016-11-21 00:00:00yTHESIS 00104070aRESEARCHbRESEARCHd2018-09-25l0pMP/23-239r2018-09-25 00:00:00yTHESIS